1. Field of the Invention
The present invention relates to a memory device, and more particularly to a redundancy architecture capable of performing a high speed operation of a magnetic random access memory (MRAM).
2. Description of the Background Art
An MRAM (Magnetic Random Access Memory) device has received attention as a memory device capable of performing high speed non-volatile data storage. An MRAM device is a memory device using a plurality of thin film magnetic elements formed on a semiconductor integrated circuit to perform non-volatile data storage, and being capable of performing a random access to each of the thin film magnetic elements.
It is reported that, especially in recent years, performance of an MRAM device has dramatically progressed by using thin film magnetic elements utilizing a magnetic tunnel junction (MTJ) as memory cells.
As for MRAM devices including memory cells each having a magnetic tunnel junction, disclosures are found in the following literatures 1 to 3:
Literature 1: “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell” (USA) reported by Roy Scheuerlein and other 6 colleagues, 2000 IEEE ISSCC Digest of Technical Papers, TA7.2) pp. 128 to 129;
Literature 2: “Nonvolatile RAM based on Magnetic Tunnel Junction Elements” (USA) reported by M. Durlam and other 5 colleagues, 2000 IEEE ISSCC Digest of Technical Papers, TA7.3) pp. 130 to 131; and
Literature 3: “A 256 kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM” (USA) reported by Peter K. Naji and other 4 colleagues, 2001 IEEE ISSCC Digest of Technical Papers, TA7. 6) pp. 122 to 123.
FIG. 36 is a schematic diagram showing a configuration of a memory cell having a conventional magnetic tunnel junction (hereinafter, simply referred to as “MTJ memory cell”).
Referring to FIG. 36, an MTJ memory cell includes a tunneling magneto-resistance element TMR changing an electric resistance according to a storage data level, and an access element ATR for forming a path of a sensing current Is passing through tunneling magneto-resistance element TMR in data reading. Access element ATR is typically formed of a field effect transistor. In the following description, therefore, access element ATR is also referred to as an access transistor ATR. Access transistor ATR is coupled between tunneling magneto-resistance element TMR and a fixed potential (ground potential Vss).
Arranged to a MTJ memory cell are: a write word line WWL for instructing data writing; a read word line RWL for performing data reading; and a bit line BL which is data line for transmitting an electric signal corresponding to a data level of storage data in data reading and data writing. Note that write word line WWL is also referred to as a digit line DL.
FIG. 37 is a conceptual view for describing a data read operation from an MTJ memory cell.
Referring to FIG. 37, tunneling magneto-resistance element TMR includes a ferromagnetic material layer having a fixed prescribed magnetic direction (hereinafter, also simply referred to as “fixed magnetic layer”) FL, and a ferromagnetic material layer to magnetized in a direction corresponding to a magnetic field applied externally hereinafter, also simply referred to as “free magnetic layer”) VL. A tunneling barrier (a tunneling film) TB made of a dielectric film is provided between fixed magnetic layer FL and free magnetic layer VL. Free magnetic layer VL is magnetized either in the same direction as fixed magnetic layer FL or in the opposite direction thereto according to storage data to be written. A magnetic tunnel junction is formed from fixed magnetic layer FL, tunneling barrier TB and free magnetic layer VL.
In data reading, access transistor ATR becomes conductive in response to activation of read word line RWL. Thereby, a sensing current Is can be caused to flow from bit line BL into a current path leading to grounded node through tunneling magneto-resistance element TMR and access transistor ATR.
An electric resistance of tunneling magneto-resistance element TMR varies depending on the relative relation in magnetic direction, parallel or anti-parallel, of free magnetic layer VL with respect to fixed magnetic layer FL. To be concrete, an electric resistance of tunneling magneto-resistance element TMR is lower when a magnetic direction of fixed magnetic layer FL and a magnetic direction of free magnetic layer VL are parallel to each other than when being anti-parallel.
Therefore, if free magnetic layer VL is magnetized in a direction corresponding to storage data, a change in voltage generated across tunneling magneto-resistance element TMR caused by sensing current Is is different according to a storage data level. Accordingly, data can be read if a prescribed voltage is applied to a memory cell to detect a change in sensing current Is according to data stored in the memory cell with a current detection type sense amplifier in reading the memory cell data. Furthermore, for example, storage data of an MTJ memory cell can be read by detecting a voltage of bit line BL if sensing current Is is caused to flow in tunneling magneto-resistance element TMR after bit line BL is precharged at a prescribed potential.
FIG. 38 is a conceptual view describing a data write operation on a MTJ memory cell.
Referring to FIG. 38, in data writing, read word line RWL is deactivated, in response to which access transistor ATR becomes non-conductive. In this state, a data write current for magnetizing free magnetic layer VL in a direction corresponding to write data is caused to flow through write word line WWL and bit line BL. A magnetic direction of free magnetic layer VL is determined by a magnetic field H (BL) generated by the data write current flowing through bit line BL.
FIG. 39 is a conceptual graph describing a relationship between a data write current in data writing into an MTJ memory cell and a magnetic direction of a tunneling magneto-resistance element.
Referring to FIG. 39, the abscissa H (EA) shows a magnetic field applied in the direction of the easy axis (EA) in free magnetic layer VL in tunneling magneto-resistance element TMR. On the other hand, the ordinate H (HA) shows a magnetic field acting in the direction of the hard axis in free magnetic layer VL. Magnetic fields H (EA) and H (HA) correspond to respective magnetic fields generated by currents flowing bit line BL and write word line WWL, respectively.
In an MTJ memory cell, a magnetic direction fixed in fixed magnetic layer FL is along the easy axis of free magnetic layer VL and free magnetic layer VL is magnetized along the easy axis direction in parallel or anti-parallel to the fixed magnetic direction according to a level of storage data (“1” or “0”). In the following description of this specification, electrical resistance values of tunneling magneto-resistance element TMR corresponding to the respective two kinds of magnetic directions of free magnetic layer VL are indicated as R1 and R0 (where R1>R0). An MTJ memory cell can store 1 bit data (“1” or “0”) correspondingly to such respective magnetic directions of free magnetic layer VL.
A magnetic direction of free magnetic layer VL can be newly rewritten only when the sum of applied magnetic fields H (EH) and H (HA) reaches a point in the outside region of an asteroid characteristic curve shown in the figure. That is, in a case where an applied data write magnetic field is of a strength corresponding to a point in the inside region of the asteroid characteristic curve, no change occurs in a magnetic direction of free magnetic layer VL.
As shown in the asteroid characteristic curve, by applying a magnetic field in a hard axis direction to free magnetic layer VL, reduction can be realized in threshold strength of a magnetic field along the easy axis direction necessary for changing a magnetic direction.
In a case where an operating point in data writing is designed as shown in the example of FIG. 39, the design is performed so that a data write magnetic field in the easy axis direction in an MTJ memory cell is HWR in strength. That is, a value of a data write current caused to flow through bit line BL or write word line WWL is designed so as to obtain data write magnetic field HWR. In general, data write magnetic field HWR is indicated by the sum of a switching magnetic field HSW necessary for change-over of a magnetic direction and a margin ΔH. That is, HWR=HSW+ΔH.
It is necessary to cause a data write current equal to or more than a prescribed level to flow through write word line WWL and bit line BL both in order to rewrite storage data in an MTJ memory cell, that is a magnetic direction of tunneling magneto-resistance element TMR. By doing so, free magnetic layer VL in tunneling magneto-resistance element TMR is magnetized in parallel or anti-parallel to a magnetic direction of fixed magnetic layer FL according to a direction of a data write magnetic field along the easy axis (EA). A magnetic direction written at a time in tunneling magneto-resistance element TMR, that is storage data in an MTJ memory cell, is held in a non-volatile fashion during a period till new data writing is performed.
An electric resistance of tunneling magneto-resistance element TMR, in such a way, is changed by an applied data write magnetic field according to a rewritable magnetic direction. Non-volatile data storage can be performed by relating two-way magnetic directions of free magnetic layer VL in tunneling magneto-resistance element TMR to respective levels of stored data (“1” and “0”).
MRAM enables a higher speed access as compared with a non-volatile memory such as a flash memory. Its possibility of a high speed access entails a problem of degradation of the possible speed, however, in a case where it has a redundancy architecture. That is, an access time is extended by a time required for redundancy determination to determine whether or not an input address is an address to be replaced with a redundant cell in an address comparing circuit.
As for a solution for the problem, it is considered, for example, to perform a simultaneous parallel access to a normal memory cell and a spare memory cell in data reading. In MRAM, however, a value of a read current is small since a resistance value of a memory cell is as high as tens of kΩ. For example, in MRAM, a voltage as low as on the order of 0.5 V is applied to a memory cell in reading of memory cell data to detect a change of several μA in read current of the order of 20 μA according to data stored in the memory cell with a current detection type sense amplifier.
In this situation, the following two points are problematic. First, access performance becomes deteriorated in case of a large resistance value of a current path through which a read current of a selected memory cell flows, especially a large electric resistance of a source line of the memory cell. Second, since in parallel access, simultaneous read operations are performed on a plurality of memory cells, a problem of an electric resistance of the source line becomes more conspicuous.